Senior DFT Engineer

Job DescriptionWhat You Can ExpectWe are looking for a Senior Staff DFT Engineer with hands-on experience in scan-based DFT implementation, including Scan Streaming Network (SSN) and IJTAG (IEEE 1687). This role focuses on end-to-end scan execution, from insertion and verification through DRC closure, coverage improvement, and final DFT signoff. The ideal candidate will own scan quality, coverage closure, and DFT signoff for complex SoC designs.Key ResponsibilitiesLead hands-on scan DFT implementation, including scan insertion, stitching, SSN implementation, and IJTAG (IEEE 1687) integrationPerform scan DFT verification, debug, and DFT DRC closure across complex SoC designsDebug and resolve scan-related DRCs, connectivity issues, and control signal problemsRun, analyze, and debug SpyGlass DFT/RTL checks in collaboration with design teamsGenerate, simulate, and debug ATPG scan patterns; analyze results and drive coverage closureDevelop and validate DFT timing constraints (scan, shift, capture, and test modes)Create and maintain TCL scripts for scan insertion, ATPG setup, and coverage analysisOptimize scan implementations for improved pattern efficiency and test qualitySupport hierarchical scan integration at block and SoC levelsCollaborate closely with RTL and Physical Design teams to resolve scan-related challengesSupport pre-silicon DFT signoff and post-silicon pattern bring-up and debugAssist with ATE pattern conversion and scan debug activitiesRequired QualificationsBachelor's degree in Computer Science, Electrical Engineering, or related field with 5-10 years of experience, OR Master's/PhD with 3-5 years of experience8+ years of hands-on experience in DFT scan implementationStrong expertise with Siemens Tessent, including scan insertion, verification, ATPG, and coverage analysisHands-on experience with IJTAG (IEEE 1687) and Scan Streaming Network (SSN)Strong understanding of IEEE 1149.x, IEEE 1500, and IEEE 1687 standardsProven experience in resolving scan DFT DRCs and driving coverage closureStrong TCL scripting skills for automation and flow developmentExperience in developing and validating scan/test timing constraintsEnd-to-end DFT lifecycle experience from RTL/netlist to silicon debugStrong debugging, ownership, and problem-solving skillsExcellent verbal and written communication skillsPreferred QualificationsExperience with scan compression and advanced scan architecturesPost-silicon experience including pattern bring-up, debug, silicon characterization, and yield learningExperience mentoring junior engineers or owning DFT scan signoff

Created: 2026-05-09