Principal Digital Design Engineer
OSI Engineering - San Jose, CA
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Principal Digital Design EngineerA premier chip and silicon IP provider focused on accelerating and securing data is seeking an exceptional Principal Digital Design Engineer to join its Memory Interface Chip (MIC) team in San Jose, CA. This is an exciting opportunity to work alongside some of the industry's most innovative engineers on cutting-edge technology that drives faster and more secure data solutions.In this full-time role, the Principal Digital Design Engineer will report directly to the Senior Director of Analog Engineering and play a key role in the development of MIC products. The engineering team is focused on advancing DIMM Interface Chips, and this position will be central to driving progress on PMIC, TS, and SPD initiatives.Responsibilities:Work with analog/digital design team for new product developmentResponsible for digital architecture design, RTL coding, functional simulation, analog-block Verilog model, post-pr simulationSupport bench test, support ATE testSupport chip bringing-up, debugging, failure analysis, characterizations and product release effortsMicro-controller firmware initial developmentRequirements: Master degree or above in EE or related fieldAt least 7 years of digital IC design experienceExperience in the area listed below:Embedded SRAM/OTP/Efuse/MTP controllerDesign for test for digital block, analog blockCommunication bus such as I2C/I3C/SPI/AHB/APBLogic equivalent checkStatic timing checkFamiliar to schematic editorMicro-controller firmware development experience is a plusBeing Familiar to mixed signal design and backend is a plusMass product experience is a plusSelf-motivated and proactiveGood communication skills and a strong team player
Created: 2025-05-31