StaffAttract
  • Login
  • Create Account
  • Products
    • Private Ad Placement
    • Reports Management
    • Publisher Monetization
    • Search Jobs
  • About Us
  • Contact Us
  • Unsubscribe

Login

Forgot Password?

Create Account

Job title, industry, keywords, etc.
City, State or Postcode

RF Analog IC Layout Engineer

Jobot - San Diego, CA

Apply Now

Job Description

IC Layout Engineer Needed / San DiegoThis Jobot Job is hosted by: Kevin SzilagyiAre you a fit? Easy Apply now by clicking the ''Apply Now'' button and sending us your resume.A bit about us:If you are an experienced high level Analog IC Layout Engineer , this opportunity is for you. Based in San Diego the company performs cutting-edge research in smartphone technologies, including but not limited to communications, computer vision, and video and image processing. With a staff comprised of talented scientists and engineers, we deliver designs, algorithms and products that provide a positive impact on end users'' daily interactions with technology, whether it be with smart devices, communication networks, or services in the cloud.Why join us? Great Work Environment Competitive Base Salary Amazing Benefits PackageJob DetailsResponsibilities:In a multi-site project team, you are working on the layout of mobile RF transceiver IC''s for cellular (4G/5G) and Connectivity (WiFi/Bluetooth/GNSS):ï‚§ Full custom layout and verification at block level and top-level chip designsï‚§ Chip floor planning, pin placement and die area management, Pad ring layout and ESD insertion, full-chip physical verification, tapeoutï‚§ Quickly interpret and repair complicated LVS and DRC problems using state of the art verification softwareï‚§ Work closely under the supervision of IC designers to iterate designs based on parasitic extractionRequired skills/tools:ï‚§ 10 or more years of experience in RF or analog IC layout.ï‚§ Understanding of layout techniques for design-for-manufacture in deep sub-micron and finFET processes is preferredï‚§ Prior work experience with Cadence and a good familiarity with physical verification tools (Assura or Calibre)ï‚§ Understanding of the physical reason being Design Rule Checks, Layout versus Schematics verification ï‚§ Good working knowledge of UNIX/Linux and scripting languages (TCL, c-shell, Perl)Interested in hearing more? Easy Apply now by clicking the ''Apply Now'' button.

Created: 2021-11-29

➤
Footer Logo
Privacy Policy | Terms & Conditions | Contact Us | About Us
Designed, Developed and Maintained by: NextGen TechEdge Solutions Pvt. Ltd.