Design Verification Engineer II

OverviewHPR is a leading provider of high-performance and ultra-low latency electronic trading and capital markets infrastructure solutions offered as a managed service. Our cutting-edge technology is used by tier-1 financial institutions to monitor and execute trades rapidly and efficiently. As we continue to innovate and grow, we’re searching for a forward-thinking Design Verification Engineer II to help us build the future of capital markets infrastructure.As a Design Verification Engineer II at HPR, you will:Verify and maintain high-performance FPGA compute and networking systems used in electronic tradingContribute to the verification process from specification, test planning, and testbench development through execution and coverage closurePartner with design engineers to review and execute comprehensive test plansCreate and maintain reusable verification components and testbenches written in SystemVerilogHelp improve our verification processes, tools, and methodologiesRequired QualificationsBS/MS in Computer Engineering, Electrical Engineering, Computer Science, or related2+ years of experience in design verification for FPGAs or ASICsWorking knowledge of SystemVerilog for verificationComfortable working in a Linux environmentStrong problem solving, debugging, and communication skillsDesired QualificationsExposure to constrained-random verification techniques and functional coverageExperience with industry-standard simulation and debugging tools (e.g., VCS, Verdi)Familiarity with computer architecture and digital design conceptsKnowledge of networking protocols (IP, TCP, UDP)Some knowledge of C programming and scripting in Python and/or PerlThis position requires being on-site at our office in Needham, MA full-time (5 days per week)HPR does not currently provide employment sponsorshipVoluntary Self-IdentificationFor government reporting purposes, we ask candidates to respond to the below self-identification survey. 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Created: 2025-09-17