Senior Principal, Design Engineering

Introduction to the jobASML US brings together the most creative minds in science and technology to develop lithography machines that are key to producing faster, cheaper, more energy-efficient microchips. We design, develop, integrate, market and service these advanced machines, which enable our customers - the world’s leading chipmakers - to reduce the size and increase the functionality of their microchips, which in turn leads to smaller, more powerful consumer electronics.Our headquarters are in Veldhoven, the Netherlands, and we have 18 office locations around the United States including main offices in Chandler Arizona, San Jose and San Diego California, Wilton Connecticut, and Hillsboro Oregon.This position may require access to controlled technology, as defined in the Export Administration Regulations (15 C.Qualified candidates must be legally authorized to access such controlled technology prior to beginning work. Business demands may require the Company to proceed with candidates who are immediately eligible to access controlled technology.We are looking for a highly motivated, hands-on Senior Principal Design Engineer and head of the PWE. As part of the system engineering organization, the Senior Principal Design Engineer is responsible for feasibility study of advanced DUV and EUV imaging, ASML scanner model integration, defining scope of feasibility (SOF) and use case for new product feature requirements, end-to-end product application validation, proof data, new customer engagements, technology roadmap and system design specification (SDS) and system performance specification(SPS). Product acceptance test plan (ATP) and drive new product introduction.The system engineer team works closely with our development engineering software team, marketing, sales, operations, SQA, other PEG teams, and customers; The Senior Principal Design Engineer and Technical Product system engineer plays a key role in shaping and directing product growth and development. This job also provides excellent career development opportunities thanks to its broad work scope and cross team collaboration with our headquarter business unit.PhD or Masters in Electrical Engineering, Physics, Imaging science preferred, or equivalent experience.~ Minimum 8 years of experience in semiconductor industry.~Competency in programming with Matlab, Python, C++, C, for imaging product development.~ Presentation and customer support skills.~ Ability to explore new applications of our existing product line.~ Create product specification based on Marketing/customer inputs.~ Conduct feasibility studies, prototype testing and generate feature proof data.~ Documentation including the user’s manual and other technical documents.~ Knowledge of data analytics and machine learning.~ Research, evaluate, and present statistical or Machine Learning methods to provide actionable insights.~ Provide training to field engineers and key customers.~ Chemical amplified resist, Negative tone development and resist processing is a plus~ Develops, coordinates, and enforces systems, policies, procedures, and productivity standards.planning, monitoring, and appraising job results.Product development and release resource scope management to ensure product release on time with high quality.Performance management.Coaching and giving technical feedbacks to team members.Diversity and inclusionIt is the policy of the company to recruit, hire, train and promote persons in all job titles without regard to race, color, religion, sex, age, national origin, veteran status, disability, sexual orientation, or gender identity. We recognize that diversity and inclusion is a driving force in the success of our company.Role within OfficeMay require travel (specify domestic and/or international) dependent on business needs.The California base annual salary / hourly range for this role is currently $200,000 - $320,000. Pay scales are determined by role, level, location and alignment with market data. Our recruiters can share more information about our bonus program, benefits and equity during the hiring process.EOE AA M/F/Veteran/Disabilityworkday will auto generate this)

Created: 2025-09-26