Post-Silicon Power Engineer

Rivos Power Design team is seeking highly motivated candidates to perform post-silicon power activities for the new high performance power efficient SOC designs.The primary role is to engage in power hardware validation and analysis of typical workloads on server compute silicon.ResponsibilitiesAs a Post-Silicon Power Engineer, you will own or participate in the following:Analyze workloads and their power dissipation to drive the power optimization to achieve best-in-class power/performance ratioMeasure silicon power dissipation of typical server workloads (data analytics, graph algorithms, and AI/ML), analyze data, and correlate measurements with simulation resultsCollaborate cross-functionally with design, architecture, systems, and software teams to enable enterprise customer use-case power measurementsPerform silicon power measurements and correlate with partition simulations and full-chip projectionsImprove use-case power/perf ratio through tuning of hardware and software settingsSilicon register tuning to achieve power and thermal stabilityAutomate power measurement infrastructureSystem level power & performance debug.RequirementsApplicants with strong programming skills and understanding of low-power digital design and power fundamentals, including:Skilled in Assembly, C, Python, and shell programming plus associated tool chainsUse of lab equipment such as multi-meter units, oscilloscopes, etcCMOS dynamic and static power calculationExcellent skills in problem solving, written and verbal communication, excellent organization skills, and highly self-motivated.Ability to work well in a team and be productive under aggressive schedules.Education and ExperiencePhD, Master’s Degree or Bachelor’s Degree in technical subject area. #J-18808-Ljbffr

Created: 2025-10-08