Design Verification Engineer

years of experience in pre-silicon design verification • Proficiency in C-shell scripting, Verilog-HDL & System Verilog. • Strong knowledge in SV Assertions, UVM/OVM and functional code coverage. • SOC Verification experience using ARM Cortex Microcontroller is required. • Experience with advanced peripheral bus Verification IP's such as GPIO, UART, SPI, SW, JTAG, and I2C. • Proficient with Cadence tools such as NCVerilog, NCSIM, Simvision. Experience with linting tools (i.e Spyglass) will be helpful. • Exposure to SDF annotated simulations with good understanding of parasitic delays and timings is required. • Exposure to FPGA programming and FPGA tools will be helpful. • Independent, self-motivated with good analytical & communication skills. UVM/System Verilog (Preference: 5) Python (Preference: 3) Synopsys/Cadence EDA Verification Tools

Created: 2026-03-04