Custom Silicon Performance Architect

Summary: Join our innovative team at Reality Labs, where we are committed to shaping the future of wearables such as AI Smart Glasses and Augmented Reality (AR) Glasses. The rapid evolution of technology in this field demands custom silicon solutions that enhance compute performance while ensuring power efficiency. Our Reality Labs Silicon team is at the forefront of this advancement, working on state-of-the-art SoCs that synergize developments in computer vision, machine learning, mixed reality, graphics, displays, sensors, and novel methods to interact with the human body. We are driving the creation of wearables that seamlessly integrate our physical and virtual experiences throughout the day. To achieve our ambitious goals, we take a holistic view of the system-from transistors to architecture, firmware, and algorithms. We are on the lookout for a dedicated Silicon Architect to engage with a talented group of SoC and IP architects, modeling, development and validation teams, firmware developers, and program managers to expedite the development and launch of customized low-power SoCs. In this role with the Reality Labs SoC Performance team, you'll significantly influence performance modeling, correlation, workload profiling, and analysis initiatives. Key Responsibilities: Conduct comprehensive bottleneck analysis of current and future SoCs to pinpoint improvement areas. Develop precise models of IP components, SoC fabric, and DRAM to forecast performance and guide design choices. Analyze workload system usage behavior and create micro-benchmarks to assess performance outcomes. Identify optimization opportunities and partner with hardware teams to strengthen HW-SW co-design. Collaborate interdisciplinary, communicate with vendors, brainstorm innovative ideas and solutions, devise new methodologies, and coordinate multiple projects. Minimum Qualifications: Bachelor's degree in Computer Science, Computer Engineering, or a related technical field, or equivalent practical experience. 6+ years of experience in developing performance models using C/C++ or SystemC. Strong familiarity with SoC architecture, NoCs, memory subsystems, Quality of Service (QoS), and principles of heterogeneous computing. Proficiency in scripting, infrastructure, automation, and visualization with Python. Solid understanding of power concepts and trade-offs. Skilled at deconstructing technical challenges, designing performance experiments, analyzing and visualizing data, and documenting detailed analyses for peers and cross-functional teams. Preferred Qualifications: Master's degree in Electrical Engineering/Computer Science or equivalent experience. Experience with cycle-accurate performance models and frameworks for assessing performance architectures of various SoC components (e.g., Accelerators, NoC, DRAM, MMU). Hands-on experience with bare-metal programming, micro-benchmarking, performance instrumentation, and Simpoints. Familiarity with RTL design verification. Compensation: $146,000/year to $209,000/year + bonus + equity + benefits Industry: Internet Equal Opportunity: At Meta, we pride ourselves on being an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based on race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity, gender expression, transgender status, sexual stereotypes, age, protected veteran status, disability status, or any other legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable laws. Meta participates in the E-Verify program in certain locations, as required by law. Please be aware that Meta may utilize artificial intelligence and machine learning technologies during the recruitment process. We are dedicated to providing reasonable accommodations for candidates with disabilities throughout our recruitment process. If you require assistance or accommodations due to a disability, please inform us.

Created: 2026-03-10