1. Working on High Performance CPU APR and PV signoff for 3nm or latest technology nodes. 2. Developing advanced clock tree structures. 3. Conducting PPA evaluation and risk assessment in the early stages of the project. 1. Minimum of 5 years of hands-on experience in Physical Design. 2. Proficiency in Perl, Python, TCL, and Make scripting. 3. Prior experience in CPU physical implementation is a plus. 4. Additional experience in Synthesis, Formal Equivalence Checking, Flow Automation, IR Analysis, and STA Analysis is advantageous.