Signal Integrity Engineer

Perform COM (channel margin analysis) to provide design trade-offs amongst ASIC package, board, and connectors. Develop ASIC PAM 4 Ser. Des channel simulation models and correlate to test structures. Correlate ASIC PAM 4 Ser. Des simulation results with Measurements and work with component and ASIC vendors to improve model accuracy. Perform PCB timing analysis, work with board engineers and layout designers to implement all design SI rules, develop and document all layout/ SI design rules and checklists. ASIC PAM 4 Ser. Des parametric tuning to improve design margins of serial links. Perform SI DVT measurements on boards and correlate simulations with DVT measurements. Provide technical assessment of projects to SI management team. Basic Requirements:Typically, 10 years of Signal Integrity analysis experience with a bachelors degree in Electrical engineering, Computer engineering, Microwave, and/or RF engineering. Typically, 8 years of Signal Integrity analysis experience with a tegrity, Electrical Engineer, Computer Engineer, Engineer, Microwave, Technology, Business Services, Design

Created: 2026-05-09