CPU Power Management Microarchitect/RTL Engineer

CPU Power Management Microarchitect/RTL Engineer Santa Clara, California, United States Hardware Summary Posted: Oct 07, 2024 Role Number: 200571950-3760 Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hard-working people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Do you want to join us in these pursuits? Join us to help deliver the next groundbreaking Apple productAppleu2019s Silicon Engineering Group (SEG) designs high-performance, low power microprocessors that power our innovative products, including the iPhone, iPad, Watch, Vision Pro, and Mac. We are looking for an experienced technical leader to drive architecture and RTL for world-class CPU power management solutions. Description As a CPU Power Management Microarchitect/RTL Engineer, you will own or contribute to the following:u2022 Micro-architecture development and specification - from early high-level architectural exploration, through micro-architectural research and arriving at a detailed specification.u2022 RTL ownership - development, assessment and refinement of RTL design to target power, performance, area and timing goals.u2022 Verification - support the verification team in test bench development, formal methods, and simulation/emulation for functional verificationu2022 Performance exploration and correlation - explore high performance strategies and work with the performance verification team to verify that the RTL design meets targeted performance.u2022 Design delivery - work with multi-functional engineering team to implement and verify physical design on the aspects of timing, area, reliability, testability and power. Minimum Qualifications + Minimum BS and 10+ years of relevant industry experience + Knowledge of microprocessor architecture + Knowledge of Verilog and/or VHDL + Experience with simulators and waveform debugging tools + Knowledge of logic design principles along with timing and power implications Preferred Qualifications + Expertise in one or more of the following areas: + Coherence protocols and interconnects + High performance (low latency, high bandwidth) design techniques + Memory subsystem queuing, scheduling; starvation and deadlock avoidance + SRAM design basics + Multiple clock/power domains and power management strategies + Prefetchers, replacement policies + Debug capabilities + DFT strategies + Error detection and correction + Understanding of low power microarchitecture techniques + Understanding of high-performance techniques and trade-offs in a CPU microarchitecture + Experience in C or C++ programming + Experience using an interpretive language such as Perl or Python Pay & Benefits At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $181,100 and $318,400, and your base pay will depend on your skills, qualifications, experience, and location. Apple employees also have the opportunity to become an Apple shareholder through participation in Appleu2019s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Appleu2019s Employee Stock Purchase Plan. Youu2019ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses u2014 including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation.Learn more about Apple Benefits. ( Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program. Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.Learn more about your EEO rights as an applicant (. Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.Learn more about your EEO rights as an applicant (. Apple will not discriminate or retaliate against applicants who inquire about, disclose, or discuss their compensation. Apple participates in the E-Verify program in certain locations as required by law.Learn more about the E-Verify program (. Apple is committed to working with and providing reasonable accommodation to applicants with physical and mental disabilities. Reasonable Accommodation and Drug Free Workplace policy Learn more . Apple is a drug-free workplace. Reasonable Accommodation and Drug Free Workplace policy Learn more . Apple will consider for employment all qualified applicants with criminal histories in a manner consistent with applicable law. If youu2019re applying for a position in San Francisco, review the San Francisco Fair Chance Ordinance guidelines applicable in your area. It is unlawful in Massachusetts to require or administer a lie detector test as a condition of employment or continued employment. An employer who violates this law shall be subject to criminal penalties and civil liability.

Created: 2025-09-10