Digital Implementation Engineer

Job Description Dayu2011tou2011Day Responsibilities u2022 Take RTL from internal design teams and push it through the full frontend implementation flow (synthesis u2192 DFT u2192 STA u2192 LEC u2192 signoff). u2022 Implement and iterate SDC timing constraints to achieve timing closure for assigned partitions. u2022 Run synthesis, generate timing reports, perform quality checks, and prepare implementation data for backend teams. u2022 Partner with external PNR (Place & Route) vendors to resolve timing issues, DFT logic placement impacts, and integration concerns. u2022 Execute multiple rounds of design and timing improvements across all assigned partitions. u2022 Track and meet internal quality metrics for each iteration, ensuring final partitions meet foundryu2011level signoff requirements ahead of December 2026 tapeout. u2022 Use Synopsys and Siemens tools to execute flow steps and validate results at each stag A client of Insight Global is seeking a highly skilled ASIC Frontend Digital Implementation Engineer with expertise in industryu2011standard Digital Implementation tools (Synopsys, Cadence, Siemens EDA). The engineer will drive frontend RTLu2011tou2011signoff execution, collaborating closely with internal RTL designers and external backend PNR teams. This role supports multiple 2u20133Mu2013instance partitions and contributes directly to successful tapeout for a major December 2026 deliverable. We are a company committed to creating diverse and inclusive environments where people can bring their full, authentic selves to work every day. We are an equal opportunity/affirmative action employer that believes everyone matters. Qualified candidates will receive consideration for employment regardless of their race, color, ethnicity, religion, sex (including pregnancy), sexual orientation, gender identity and expression, marital status, national origin, ancestry, genetic factors, age, disability, protected veteran status, military or uniformed service member status, or any other status or characteristic protected by applicable laws, regulations, and ordinances. If you need assistance and/or a reasonable accommodation due to a disability during the application or recruiting process, please send a request to learn more about how we collect, keep, and process your private information, please review Insight Global's Workforce Privacy Policy: Skills and Requirements Mustu2011Haves u2022 Strong handsu2011on experience with Digital Implementation tools (Synopsys DC/Formality/PrimeTime, Cadence, and/or Siemens Tessent). u2022 Digital synthesis and DFT insertion experience. u2022 Proficiency in STA, LEC, and digital signoff methodologies. u2022 Experience supporting backend PNR teams (timing, constraints, debug). u2022 Background working with advanced FinFET process nodes (e.g., TSMC12 or below). u2022 Ability to drive multiple 2u20133M instance digital partitions through repeated implementation iterations. u2022 Experience writing and refining SDC timing constraints. Plusses u2022 10+ years of implementation experience (not required; u2022 Experience with inu2011house or custom digital implementation flows. u2022 Prior work on complex SoC programs with crossu2011functional backend/RTL interactions. u2022 Strong understanding of foundry signoff requirements and metrics.

Created: 2026-01-28