Senior Test and Validation Engineer, Silicon, Bringup

Senior Test and Validation Engineer, Silicon, Bringup _corporate_fare_ Google _place_ Fremont, CA, USA Advanced Experience owning outcomes and decision making, solving ambiguous problems and influencing stakeholders; deep expertise in domain. Minimum qualifications: + Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. + 8 years of experience in analog circuit design, including simulation and verification. + Experience working with relevant electronic design automation (EDA) tools for circuit design and analysis. Preferred qualifications: + Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture. + 10 years of experience in custom silicon design, with a focus on digital logic design, analog design and test, and DFT implementation. + Experience with advanced DFT techniques such as hierarchical DFT, compression, and diagnosis. + Experience with custom silicon bringup, leading test plan development, and performing in-depth silicon validation. + Proficiency in hardware description languages (e.g., Verilog, SystemVerilog). + Excellent problem-solving, communication, and teamwork abilities. About the job Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. In this role, you will lead custom silicon bringup, Verilog code development, and Automated Test Equipment (ATE) engineering. You will be responsible for defining post-silicon validation specifications and executing in-depth debug, specifically focusing on microdisplay backplane validation.Google's Raxium display group has established a revolutionary semiconductor materials display technology that enables new functionality in display products, bringing to users a closer and more natural linkage between the digital and physical realms in applications such as augmented reality (AR) and light-field display. With start-up roots and a state-of-the-art compound semiconductor fab in Silicon Valley, Raxium is seeking to build upon its engineering team with an aim to disrupt next-generation display markets. The US base salary range for this full-time position is $183,000-$271,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process. Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more aboutbenefits at Google (. Responsibilities + Lead the bring-up process on debugging stations, including, but not limited to, FPGA-based platforms. Additionally, assist in the analysis of silicon failures and collaborate with design and test engineering teams to ascertain root causes. + Advocate enhancements in the silicon validation flow, encompassing new tools, methodologies, and scripts, to significantly boost efficiency and coverage. + Forge partnerships with the Architecture, Physical Design, and Test Engineering teams to guarantee seamless integration and execution of the Design-for-Test (DFT) plan. + Architect, design, and implement digital logic utilizing Verilog or System Verilog, deriving from high-level specifications. + Collaborate with the verification team to meticulously define test plans, formulate assertions, and debug logic issues. Information collected and processed as part of your Google Careers profile, and any job applications you choose to submit is subject to Google'sApplicant and Candidate Privacy Policy (./privacy-policy) . Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition (including breastfeeding), expecting or parents-to-be, criminal histories consistent with legal requirements, or any other basis protected by law. See alsoGoogle's EEO Policy (,Know your rights: workplace discrimination is illegal (,Belonging at Google (, andHow we hire (. If you have a need that requires accommodation, please let us know by completing ourAccommodations for Applicants form (. Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting. To all recruitment agencies: Google does not accept agency resumes. Please do not forward resumes to our jobs alias, Google employees, or any other organization location. Google is not responsible for any fees related to unsolicited resumes.Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also and If you have a need that requires accommodation, please let us know by completing our Accommodations for Applicants form:

Created: 2026-02-04