Front-End CAD Methodology Engineer u2013 Design/DV ...

Role Number: 200649228-3401 Summary Do you love building elegant solutions to highly complex challenges? As part of our Silicon Technologies group, youu2019ll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). Youu2019ll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means youu2019ll be responsible for crafting and building the technology that fuels Appleu2019s devices. Together, you and your team will enable our customers to do all the things they love with their devices Description The Front-End CAD Methodology Engineer plays a key role in promoting and driving robust, scalable methodology solutions across RTL Design and DV teams within Appleu2019s HWTech organization. This role leverages advanced automations and GenAI-driven capabilities to enhance engineering productivity, improve methodology quality, and enable intelligent workflow optimization across static verification, formal verification, simulation and emulation domains.This position requires a combination of deep technical expertise, architectural vision, and technical leadership to identify high-impact opportunities, design and architect innovative solutions, including GenAI-enabled tooling, and drive adoption across a large globally distributed engineering organization. You will work closely with the different design organizations and CAD teams to translate complex engineering challenges into scalable, reusable, and forward-looking methodology solutions that accelerate silicon development and verification while maintaining the highest standards of quality and short, this position focuses in fostering our North Star and making sure that our vision statement extends across the different design groups:To create, monitor, and maintain high quality flows that enable Apple Silicon to produce chips that enable Apple's best products.You will be working with an energized and highly motivated CAD team that comprehensively supports Appleu2019s chip design efforts. Minimum Qualifications + Minimum of BS degree and 15+ years of relevant experience + Experience with Front-End ASIC workflows + Experience working directly with design and verification engineers to define requirements and implement solutions + Experience with artificial intelligence and machine learning Preferred Qualifications + Experience debugging vendor tool problems + Experience with Cadence or Synopsysu2019 static/formal/dynamic verification tools + Experience with Python, TCL or Perl + Experience with JSON or YAML + Knowledge in Verilog and SystemVerilog; familiarity with VHDL + Demonstrated experience driving large-scale software system development from specification to deployment + Experience in implementing new functionality to solve emerging problems or to optimize already existing methods + Great teammate with strong written and verbal interpersonal skills, and a service and support mentality + Good communications skills are required and prior customer support experience + MSEE/CE/CS preferred Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant (.

Created: 2026-03-07